1. Field of the Invention
The invention relates to a non-volatile memory device and, more particularly, to a non-volatile memory device capable of shortening a program time.
2. Description of Related Art
Non-volatile memory devices, such as flash memories, continuously hold data stored in a cell even when their power supplies are interrupted. Typical flash memories can electrically erase cell data collectively. Therefore, flash memories are widely used in computers, memory cards and the like.
Flash memories are categorized into NOR-type and NAND-type according to their cell-bitline connecting configurations. In a NOR-type flash memory, at least two cell transistors are connected in parallel to a bitline and data is stored using channel hot electrons, and erased using Fowler-Nordheim tunneling (F-N tunneling). In a NAND-type flash memory, at least two cell transistors are connected in series to a bitline and data is stored and erased using F-N tunneling. With a large consumption of current, NOR-type flash memories are disadvantageous in high integration density. With the smaller consumption of cell current than NOR-type flash memories, NAND-type flash memories are advantageous in high integration density.
A cell array of a NOR-type flash memory includes a plurality of banks, each having a plurality of sectors, each having a plurality of memory cells. Generally, an erase operation of a NOR-type flash memory is executed by sectors and a program operation thereof is executed by words (or bytes).
In order to program data to a cell array of a NOR-type flash memory, a program command is input to the flash memory. A program address and program data are input to the flash memory. The input program address and program data are temporarily stored in a chip. A memory cell corresponding to the program address is selected. A program voltage corresponding to the program data is applied to a bitline, practically executing a program operation. After passing an internally predetermined program execution time, a verify operation is executed to verify whether the data is programmed to the selected memory cell. Such program and verify operations are iteratively executed until the data is normally programmed to the selected memory cell.
For hot channel electrons used to program a NOR-type flash memory, a high voltage of 4–6 volts is applied to a drain of a memory cell. Therefore, program current over a determined level is needed. Since the high voltage applied to the drain is generated through a charge pump constructed in a chip, the number of simultaneously programmed memories is just two to four. For example, if the number of simultaneously programmed bits is four, 16-bit data is divided by 4 bits and programmed to a memory cell four times.
A program characteristic of a flash memory will now be described in brief. In order to execute a program operation in a flash memory, a corresponding address section must be erased (i.e., a data value is made to be “0”) beforehand. Therefore, a no-program operation is executed before programming desired data to erase an address section, even though, in a bit-by-bit perspective, this is redundant and a waste of time for desired data bits that are “0”. Most flash memories uniformly assign a determined program time to each data group irrespective of the fact that a value of data to be programmed is “0” or “1”. As a result, a determined time is required for programming data irrespective of a value of the program data. This presents an overall program time that is excessively long.